Method for obtaining line synchronization information items from a video signal, and apparatus for carrying out the method

ABSTRACT

A method for obtaining line synchronization information items from a video signal is proposed. The inventive method is based on convolving the relevant part of an analogue video line signal with a pattern function. The result of the convolution operation is further processed to determine the time instants of the occurrence of the horizontal sync signals. The time instants are subsequently filtered to generate horizontal pulses. A video line memory allows to utilize subsequent horizontal sync signals for calculating the horizontal sync pulse of a current video line. The invention also relates to an apparatus for carrying out the method.

FIELD OF THE INVENTION

[0001] The invention relates to a method for obtaining linesynchronization information items from a video signal. According to asecond aspect the invention is related to an apparatus for generating aline synchronisation pulse for a video line signal.

BACKGROUND

[0002] In today's television receivers and computer TV cards it isnecessary to separate synchronisation signals (or in short: syncsignals) to achieve a proper representation of the video image on thedisplay, e.g. a cathode ray tube.

[0003] Even though digital system solutions will become increasinglypredominant in future television technology, analogue source signalswill still exist for many years in the future. Examples include theterrestrial reception of video signals, which is still widespread todate, and the analogue recording methods, e.g. according to the VHSstandard in the case of video recorders. Such analogue signal sourcesrepresent critical signal sources for digital systems, and their signalprocessing requires special measures. The situation is the same forfuture multimedia terminals as long as they are equipped with ananalogue video input. Due to the existence of large quantities ofanalogue video material, e.g. VHS tape libraries, it is unlikely thatthe use of analogue video signals could disappear in the near future.

[0004] Conventionally, a sync slicer is used for sync separation. Thesync slicer is combined with a PLL (Phase Locked Loop) for “smoothing”the extracted sync information. The PLL technology is mature but haswell known limitations due to two conflicting requirements: On the onehand the PLL must have a low-pass characteristic to suppressdisturbances in the sync signal detection caused by noise. On the otherhand, tape recorders, in particular camcorders, output the video signalon a variable time base due to mechanical tolerances. The time basevariations also appear as disturbances of the sync signal to the PLL.However, this kind of disturbance has to be passed through withoutattenuation because any alterations of the time base would createhorizontal instabilities of the displayed video picture. In other words:The PLL has to suppress noise on the one hand and has to pass time-basevariations on the other hand. Fortunately, the two effects aredistinguishable by their frequency. Time-base variations are a lowfrequency effect above 1 kHz. As the PLL is always a second order loop,corner frequencies and stability are selected in every new designedsystem for best compromise.

[0005] Television receivers with digital signal processing (e.g. in thecase of the 100 Hz technology) have been operating, as a rule, withclock systems, which are synchronized with the respective input signal.Since the input signal is the analogue CVBS signal, either thehorizontal sync pulse (line-locked clock) or, alternatively, the coloursubcarriers or colour synchronizing pulses (burst) (coloursubcarrier-locked clock) are frequently used as reference point for thesynchronization. The sync separation in the video lines has usually beencarried out to date by means of analogue methods using so-called syncseparator stages and a PLL filter stage connected downstream. Intelevision receivers with digital signal processing, a PLL filter stage,which is a digital realization of the known analogue sync signalprocessing is commonly used. The filter stage is then a digital PLL(Phase-Locked Loop). Examples of such digital PLL circuits are thecircuits SAA 7111 from Philips, HMP 8112 from Harris and Digit 3000 fromMicronas. The principal problem with such digital PLL circuits is thatthe known instabilities in the picture occur when the input signalpresent is an analogue video signal picked off from an analogue videorecorder, which is currently operating in the search mode (fast forwardor reverse run). Many users of analogue video recorders are sufficientlyacquainted with such instabilities. Specifically, disturbing horizontalstripes appear in the picture when the video recorder is operating inthe search mode. These disturbing stripes originate from the fact thatin the search mode, the video heads no longer run on a single slantedtrack but rather sweep across two or more slanted tracks, depending onthe search speed. During the transition from one slanted track to thenext, abrupt sudden phase changes arise with regard to the occurrence ofthe sync pulses of the video lines. These sudden phase changes areactually governed by the geometry in magnetic tape recording inaccordance with the slanted track method. The sudden phase changes aretherefore determined by the system and, in addition, virtuallyunavoidable.

[0006] Irregular occurrence of line sync pulses also arises, however, inthe case of video signals generated by camcorders. In this case, theinstabilities that occur are, as a rule, more severe than in the case ofa normal video recorder, because the regulation of the head-drum speedis subject to greater fluctuations on account of the larger componenttolerances.

[0007] EP-A 0 266 147 discloses a digital PLL circuit for a televisionreceiver. In the case of this digital PLL circuit, in order to avoid-theabovementioned problem in the search operating mode in video recorders,a switching unit is provided which drastically shortens the timeconstant of the phase-locked loop in the event of identification of asudden phase change caused by the head changeover at the end of aslanted track, with the result that the region of instability in thepicture is reduced in size. The disadvantage of this solution is thatthe reduction of the time constant of the phase-locked loop provided bythis solution means that noise components in the video signal are ableto be suppressed less well and disturbing lines still remain visible,even though to a lesser extent than when the time constant is larger.

[0008] In EP-A 0 899 945 a method is for obtaining line synchronizationinformation is described. According to the known method a video line isconvoluted with an idealized horizontal synchronization pulse. Theresult of the convolutions processed in an open loop system replacingthe PLL. The open loop system is realized by a linear regression toextrapolate the best guess of a current sync pulse using past syncpulses.

[0009] Convolving, or convolution, is a well-known term meaning theintegral of one function multiplied by another function, which isshifted in time, see for example in “New IEEE Standard Dictionary ofElectrical and Electronics Terms”, 1993.

[0010] Using the known systems as a starting point it is desirable tohave a method providing an even better performance with regard tohorizontal synchronization of the video lines.

SUMMARY OF THE INVENTION

[0011] The present invention suggests a method for obtaining linesynchronization information from a video line signal. According to theinventive method the relevant part of the video line signal is analysedto determine time instants defining the temporal position of the linesynchronization pulses. A predetermined number of video lines is storedin a line delay. Using this as a data base a filtered time instant for avideo line preceding the currently received video line by the number ofvideo lines stored in the line delay.

[0012] In an embodiment of the invention the calculation is aninterpolation of the time instants determined for video lines precedingand following the currently displayed video line. Specifically, inanother embodiment the interpolation is a linear interpolation.

[0013] In order to define the time instants of the synchronizationpulses precisely it is suggested to convolute the entire or relevantpart of the video line with a pattern function. An idealizedsynchronization pulse may be used as the pattern function.

[0014] According to the second aspect of the invention an apparatus forgenerating line synchronization pulses from a video line signal issuggested. The inventive apparatus comprises means for analysing theentire or the relevant part of the video line to determine time instantsdefining the temporal position of the line synchronization pulses. Theapparatus further includes a line delay for storing a number of videolines. Finally, means are provided for calculating a filtered timeinstant for a video line preceding the currently received video line bythe number of video lines stored in the line delay.

[0015] In another embodiment the apparatus comprises means forconvolving the entire or the relevant part of the video line with apattern function.

[0016] In yet another embodiment the apparatus is provided with an FIRfilter having a set of predetermined filter constants.

BRIEF DESCRIPTION OF THE DRAWING

[0017] Exemplary embodiments of the invention are illustrated in thedrawings and are explained in more detail in the following description.In the figures it is shown:

[0018]FIG. 1 simulated results for the reciprocal of the currenthorizontal frequency of line sync pulses in a video signal, which hasbeen picked off from a camcorder;

[0019]FIG. 2 a top level block diagram for baseband sync and videoprocessing;

[0020]FIG. 3 a diagrammatic illustration of a convolution operation oftwo square-wave pulses;

[0021]FIG. 4 the structure of an MTA filter (moving time average) forcarrying out the convolution operation;

[0022]FIG. 5 a diagrammatic illustration for the calculation of the zeroof the first derivative of the result function of the convolutionoperation according to the invention;

[0023]FIG. 6 a graphical illustration of the timing of the video signal,the horizontal sync signal and the system clock;

[0024]FIG. 7 the time positions of the horizontal sync pulses, aschematic structure of the FIR filter and a graphical representation oft he used filter coefficients;

[0025]FIG. 8 the circuit section handling the time management of thesynchronisation signal processing;

[0026]FIG. 9 the timing of the counters incorporated in the timemanagement circuit section;

[0027]FIG. 10 the time positions of the detected H_(sync) pulses, theoutput pulses of the H_(sync) detector and the output pulses of thehorizontal filter;

[0028]FIG. 11 a comparison of the error transfer function and transferfunction of different types of H_(sync) processing means;

[0029]FIG. 12 the filter coefficients of different types of filters, and

[0030]FIG. 13 a video picture exemplifying the improvement of theinvention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

[0031] Simulated values for the position of the line sync pulses in avideo signal are plotted in FIG. 1. The number of the respective line isplotted in the direction of the abscissa in FIG. 1. The reciprocal ofthe current horizontal frequency 1/f_(H) for the line sync pulses isplotted in the direction of the ordinate of FIG. 1. The letter “n”generally designates the line number of each video line. The plotting ofthe reciprocal of the current horizontal frequency means that thetime-domain positions of the respective line sync pulses can be comparedwith one another. The values corresponding to the actual measured valuesfor the individual positions of the line sync pulses are in each casespecified by the broken vertical lines. The end of each broken verticalline then specifies the line sync pulse position established. If thevideo signal present were ideal, then all of the broken. lines wouldhave the same length. The illustration is made for a video signalgenerated by a camcorder. Fluctuations in the line sync pulse positionsabout an average value are clearly discernible in a first region ofFIG. 1. A steady increase in the line sync pulse positions can bediscerned in a second part of FIG. 1. This behaviour can be explained bythe regulation of the speed of rotation of the head-drum, thisregulation being slow to start. Component tolerances and noise may beresponsible for the variations of the line sync pulses about an averagevalue. The crosses in FIG. 1 specify the line sync pulse positionscorrected by the PLL circuits, which are usually used in the televisionreceivers. However, the regulating behaviour of this PLL circuit resultsin the outputting of a phase error with regard to the line sync pulsepositions as long as the vertical frequency in the video signal steadilychanges. This is clearly discernible in the second part of FIG. 1 fromthe difference between the crosses and the broken lines. Since the signof this phase error may be randomly distributed in the individual subpictures and, in addition, the value of the phase error likewise doesnot always remain constant, the phase deviation D is manifested as avisible disturbance in the video picture displayed. The disturbancecorresponds to a horizontal jitter effect in large parts of the picture.The picture gives the impression that somebody is shaking it in thehorizontal direction. In order to eliminate the phase error withfrequency changes occurring in the video signal, it is customary in thecase of an analogue PLL control loop to increase the bandwidth of thePLL circuit. If this measure is taken, then the line sync pulsepositions, which are indicated by circles in FIG. 1 are produced.However, this solution has the disadvantage that the noise suppressionof the PLL circuit is impaired, as a result of which momentary picturedisturbances in the form of a jitter behaviour are still discernible.Vertical lines no longer appear straight but rather distorted.

[0032]FIG. 2 shows a top level diagram of the sync and video processingof a TV incorporating the present invention.

[0033] The proposed architecture is based on a free running systemclock, e.g. a crystal oscillator. Hence, the system clock has nocorrelation to the video sync or colour subcarrier frequencies. The freerunning system clock is particularly advantageous for processor-basedsystems adapted to receive video signals of various types andproperties. However, colour burst-locked clocked systems are alsopossible to realize with the architecture described in the following ifthis is desirable for certain embodiments.

[0034] On the left hand side of FIG. 2 the inputs for analogue base bandvideo signals are shown. The inputs 1 a and 1 b are used for S videosignals having separate chrominance C and luminance Y inputs. The input2 is provided for receiving composite video signals. The analogue videosignals are converted into corresponding digital signals by A/Dconverters 3 a and 3 b, respectively. The digital output signals arethen stored in FIFO (first-in-first-out) line delays 4 a and 4 b,respectively, having a size of e.g. eight video lines. The FIFO linedelays are necessary for filtering time data used in horizontal syncprocessing, as it will be described further below.

[0035] In the signal path processing the composite video signal a combfilter is provided to separate the luminance Y and the chrominance Csignals. Subsequently, the signals are fed into a chrominance decoder togenerate the luminance signal Y and the chrominance signal C.

[0036] A switch 8 is controlled to select the luminance and chrominancesignals received from line delay 4 a or from chroma decoder 7 to befurther processed in a pixel interpolation filter 9, which will bedescribed in more detail below.

[0037] The output of filter 9 is buffered in a line buffer 11 and passedon to a colour dematrix 12 for generating digital R, G, B signals. Thedigital R, G, B signals are converted into analogue signals, amplifiedby associated drivers in block 13 and supplied to a cathode ray tube 14for display.

[0038] In case a display device different than a CRT, e.g. an LCD, TFTor plasma display is used, the signal processing may be different thanshown in the present embodiment. However, these differences do notdepart from the scope of the present invention.

[0039] For synchronization signal processing a digital luminance signalY or a digital composite video signal is selectively used depending onwhich analogue inputs are active. The signal for sync signal processingis selected by switch 16 controlled by the same control signal as theswitch 8. The vertical sync processing in block 17 is conventional andis therefore not described in more detail. The information regardingwhich field of a video frame is currently being processed is alsoobtained in this unit. The vertical sync signal V_(sync) is delayed in aline delay 18 to re-establish the timing to the video signals delayed inthe line delays 4 a and 4 b, respectively.

[0040] The V_(sync) signal is input to a microprocessor 19, which isamong other functions operative to execute the synchronization logic.

[0041] In a H_(sync) processing unit 21 the H_(sync) signals aredetected and processed by the inventive method, which will be describedin more detail below. The horizontal sync information is supplied to theμP 19. The μP 19 uses the horizontal and vertical sync information togenerate output signals for a deflection driver 22 being connected to adeflection apparatus not shown in FIG. 2.

[0042] The deflection apparatus is associated with the CRT 14 andeffects the scanning of the electron beams inside the CRT in aconventional way.

[0043] In case the display device is not a CRT the deflection driver 22is replaced by an appropriate device effecting the representation of thevideo signal line by line on the screen of the respective displaydevice.

[0044] The H_(sync) processing unit 21 comprises a H_(sync) detector 23to determine the timing of H_(sync) signals contained in the receivedvideo signal. The H_(sync) signals are filtered in a H-filter 24 and theresulting signals H_(o) and φ_(o) are provided to the μP19 and to thepixel interpolation filter 9. The operation of the H_(sync) detector 23,the H-filter 24 and the V_(sync) processor 17 is controlled by an eventcontrol 25, which will be described in more detail in connection withFIG. 8.

[0045] In contrast to the otherwise widespread edge detection for thefalling edge of a line sync pulse in the CVBS signal, the presentH_(sync) detector 23 operates according to the correlation principle. Inthis case, the CVBS signal is convolved with an ideal line sync pulseand then the minimum is sought. This principle is illustrated in FIG. 3,where it is possible to discern in principle that the convolutionoperation of two square-wave pulses generates a triangle function asresult function. This function then has a minimum or maximum, whichspecifies the position of the line sync pulse. The CVBS signal for avideo line is designated by the reference symbol f_(in)(k). Thereference symbol S_(ideal) (k) designates an ideal line sync pulse. Theresult function of the convolution operation is designated by thereference symbol φ_(SV)(k). The reference symbol k_(s) specifies theposition of the minimum of the result function. The convolutionoperation is carried out in the H_(sync) detector 23 for example in sucha way that the CVBS signal present in one of the line stores 4 a, 4 bfor a video line is digitally convolved with a corresponding ideal linesync pulse. The execution may alternatively be configured in such a waythat instead of the CVBS signal for the entire video line beingconvolved with the ideal line sync pulse, only the relevant part for theline sync pulse is convolved with the idealized line sync pulse.

[0046] This detection method behaves extremely robustly even for examplein the case of terrestrial signals with multipath propagation which aresubjected to a great deal of interference. If a constant correlationlength l_(s) is used for the convolution operation, the MTA (Moving TimeAverage) filter known from the prior art is suitable, for example forthe circuitry realization of the convolution operation, the structure ofwhich filter is illustrated in FIG. 4, where the line sync pulse isrepresented in an idealized manner with a square-wave pulse response.

[0047] In order to determine the maximum or minimum in the resultfunction of the convolution operation, the zero of the first derivativeof the result function is calculated. This computation operation isillustrated in more detail in FIG. 5, where the reference symbol φ_(SV)^((k)) designates the first derivative of the result function, thevariable k stands for the respective sample of the derivative function,k_(s) specifies the position of the zero of the derivative and k₀specifies the last sample with a negative sign in the transition regionof the first derivative of the result function. For an exactdetermination of the zero, a linear regression is carried out in thetransition region of the derivative function. The zero is thencalculated in a simple manner using the regression line established. Thepoint of intersection of the regression line with the zero axis isdesignated by the reference symbol N_(s) in FIG. 5. The regressionlength l amounts to nine samples in the example illustrated. In thisway, the minimum of the first derivative is calculated with subpixelresolution. The subpixel resolution is necessary since the subsequentvertical filtering cannot effectively eliminate pixel quantization. Thesubpixel resolution is also necessary because, e.g. given a samplingrate of 18 MHz for the A/D conversion in the A/D conversion unit 20 anda display having a width of 56 cm, the visibility limit for picturedetails is approximately 0.17 pixel. Investigations with various inputsignals have shown that a linear regression yields an optimum result forthe calculation of the subpixel resolution. For the calculation of thecentre of the line sync pulse, which corresponds to the minimum of theresult function of the convolution operation, approximately 10 samplesare sufficient for the region around the zero of the derivativefunction. The computation rule that approximately 10 samples aresufficient was established at a sampling rate of 18 MHz using videosignals having a constant horizontal frequency for varioussignal-to-noise ratios in the case of terrestrial reception. In thiscase, the standard deviation for a signal having a signal-to-noise ratioof 15 dB was 0.93 pixel. In the case of a low-noise signal having asignal-to-noise ratio of 35 dB, the standard deviation is 0.07 pixel.

[0048] If video signals originating from video recorders are processed,the horizontal frequency can deviate by up to 4% in the trick mode invideo recorders, which also proportionally affects the length of theline sync pulse. This is then manifested in a deterioration in theidentifiability of the edge in the course of the derivative function ofthe result function of the convolution operation. However, it has beenshown that deviations up to this degree have no relevant influence onthe detection accuracy in the course of the zero determination. For thecalculation of the centre k_(s) of the line sync pulse by means oflinear regression, it is possible to use an arithmetic unit instead of amore complex microprocessor, since approximately 32 μs remain for thiscalculation, which corresponds to half of one video line in the PALsystem. Moreover, the equidistant samples enable a distinctsimplification of the calculation. The formula for the calculation ofthe centre k_(s) of the line sync pulse with subpixel accuracy thenreads as follows:$k_{s} = {k_{0} - {k_{l}\frac{\sum\limits_{i = 1}^{l}{\phi_{SV}\left( {i - \frac{l}{2}} \right)}}{\sum\limits_{i = 1}^{l}\left( {\left( {i - \frac{l}{2}} \right){\phi_{SV}\left( {i - \frac{l}{2}} \right)}} \right)}}}$

[0049] In this case, k_(l) is a constant, which can be calculated as afunction of the regression length l. All the other symbols are knownfrom the description regarding FIGS. 5 and 3.

[0050] Following the time base described in connection with FIG. 6 eachvideo line duration T_(H) can be calculated by the following equation:

TH(n)=ΔH _(I)(n)+φ_(I)(n)−φ_(I)(n−1).

[0051] For an undistorted PAL standard input signal the line duration isT_(H)=64 μs. With a constant system clock frequency of f_(clk)=18 MHzthe number of clock cycles between two H_(sync) pulses would be constantat ΔH_(I)=1152. The phase difference between the H_(sync) pulses and thebeginning of a clock cycle would also be a constant value for all videolines.

[0052] However, in practice the video line duration is not constant butvariable. Noise and low frequent distortions are super imposing theinput video signal causing a time shift of the detected temporalposition of the H_(sync) pulse.

[0053] As a consequence the detected video line duration T_(H) changesline by line causing horizontal jitter. To avoid this kind of jitter itis necessary to filter the detected temporal positions of the H_(sync)pulses.

[0054] For each time instant t_(n) the H_(sync) detection block 23outputs two values, H_(I) and φ_(I). H_(I) describes the time differencebetween two H_(sync) pulses measured in integer cycles of the internalsystem clock. φ_(I) represents a fraction of one cycle allowing todetermine the temporal position of a specific H_(sync) pulse withsubpixel resolution.

[0055] In FIG. 6 the details of the timing of the different signals areshown. FIG. 6a displays an analogue composite video signal CVBS withincorporated H_(sync) pulses, which are indicated by “H”. FIG. 6billustrates the. temporal position ti of the H_(sync) pulses by verticallines 25. The abscissa in FIG. 6b is divided into units of the nominalduration T_(H) of a video line. The temporal position ti falls into aparticular cycle of the system clock. The relevant cycles define theinteger number H_(I). A comparison between FIGS. 6b and 6 c illustratesthat the nominal beginning of a video line as shown in FIG. 6b coincideswith the beginning of a cycle of the system clock as illustrated in FIG.6c. However, FIG. 6b also shows that the temporal positions ti of thedetected H_(sync) pulses do not coincide with a cycle of the systemclock. The time shift also discernible in FIG. 6b as a deviation fromthe nominal beginning of a video line is quantified by φ_(I). φ_(I)defines the fraction of a system clock cycle the respective H_(sync)pulse lags behind the clock cycle.

[0056] Several examples of the time shift are illustrated in FIG. 6dwith reference to FIG. 6c.

[0057] The time instants t_(i) determined according to the describedmethod are subsequently filtered in a horizontal filter 24. Thehorizontal filter 24 is a FIR filter having symmetrical filtercoefficients.

[0058] At a given time the FIR filter 24 takes 1 line durations ΔT_(n),n=0, . . . , 1 into account to calculate the filter output T_(m) as itis illustrated in FIG. 7a. One line duration ΔT_(n) is the timedifference between two H_(sync) pulses n and n+1, defined by the timeinstants t_(n) and t_(n+1).

[0059] The FIR filter then calculates the filter output signal accordingto the equation${T_{m} = {\sum\limits_{n = 0}^{- l}{Cn}}},{l \cdot {tn}}$

[0060] where C_(n,1) are the filter coefficients, (l+1) is the filterlength, and t_(n) the time instants of the H_(sync) pulses. In FIG. 7bthe FIR filter 24 is shown in more detail. The time instants are storedin delay stages 26 ₋₁ . . . 26 _(o). The contents of the delay stages ismultiplied with the associated filter coefficient c_(n,m) in multipliers27 ₋₁ . . . 27 _(o). The individual products are summed up in an adder28 to yield the filter output T_(m). The index m of the calculatedfilter output T_(m) is related to the number of video lines that can bestored in the line delay 4 a or 4 b. In the present embodiment the linedelay has a size of eight video lines and therefore m=7. In otherembodiments having a different size of line delay m may take a differentvalue.

[0061] It is important to note that this filter design does not containany feedback of a previous result to a subsequent result. The output ofthe horizontal filter depends exclusively on the input signals, i.e. thedetected time instants t_(i). The H-filter 24 is an open loop filter.

[0062] The horizontal filter outputs the filtered temporal position ofthe H_(sync) pulse in terms of values H_(o) and φ_(o) indicating thelength of the video line in terms of a number of system clock cycles anda phase shift relative to the system clock, respectively. The timecorrection of the video signal is done by the pixel interpolation filterblock 9, which is arranged to shift each video line in time withsubpixel resolution corresponding to the value of φ_(o), wherein0≦φ_(o)≦1. The output signal H_(o) of the H filter defines the start ofeach new video line with the accuracy of one system clock cycle.

[0063] In the previous paragraphs it has been shown that the H_(I) pulsein connection with the additional phase information φ_(I) is used asinput for the H-filter 24. The summed up time information of eachH_(sync) pulse (ΔH_(I)+φ_(I)) is stored for a defined number of lines,which equals the FIR filter length.

[0064] In the present embodiment of the inventive apparatus the timemeasurement is implemented by means of counters, requiring only a fewbasic hardware components. A practical realization is shown in FIG. 8.

[0065]FIG. 8 shows in more detail the circuit section being effectivefor the time management. The time management circuit section, which isreferenced as a whole with the reference number 31, is structured intoseveral blocks comprising a counter block 32, a comparator block 33, aphase memory 34, the FIR filter 24 and an event control 25. The detailsof the FIR filter 24 have already been described in connection with FIG.7b.

[0066] The counter block 32 includes two counters 36 a, 36 b to measurethe time difference between the occurrences of two subsequent H_(I)signals in units of clock cycles. The H_(I) signal is also supplied tothe event control 25 outputting a counter reset signal. During normaloperation the counter reset signal corresponds the H_(I) signal.

[0067] A counter control unit 37 controls a switch 38 to connect thecounter reset signal emitted by the μP 19 with either counter 36 a orcounter 36 b for resetting it. At the same time the counter control unit37 operates two further switches 39 a and 39 b to connect the output ofthe respective counter, which is not reset to one input of a comparator41. The second input of the comparator 41 is provided with the predictedvalue calculated in the H-filter 24. The calculation is based on pastand future H_(I) values. If the two input values of the comparator 41are equal it outputs the H_(o) pulse.

[0068]FIG. 9 shows the timing of the H_(I) signal, the H₀ pulse and thecontents of the counters 36 a, 36 b. One counter counts each H_(I) pulseand the other counts the number of clock cycles for counter memorystorage (circle) and output comparison (cross) and vice versa. Or inother words: The selected counter for output comparison counts thenumber of clock cycles from the last input pulse H_(I) until the outputpulse is generated by the prediction value (cross in FIG. 9). At thesame time the selected filter is reset. Fractions of a clock cycle arenot important for the counter time scheme. Fractional parts of a clockcycle are stored in the phase memory 34.

[0069] Some lines of delay/memory are needed for the new horizontalfilter technique based on an interpolation principle. In this example, a8 line delay block is used to delay the video signal by 8 video lines.This is needed, because the signal delay allows the H filter block toobtain timing information from past video lines (still stored in linememory), before the video signal is output to the pixel interpolationfilter. After passing the pixel interpolation filter, the video linesare orthogonalized with the processed timing information of the H filterand further time corrections are not possible. Using this line delay,the filter behavior can be improved as shown in the next chapter.

[0070] In FIG. 10 the timing of different types of signals is shown inan overview. From top to bottom the processing of the horizontal syncsignals is visualized beginning with the detected H_(sync) signals inFIG. 10a. On the abscissa of all diagrams in FIG. 10 the time grows fromleft to right. FIGS. 10a to 10 c correspond to the illustration in FIGS.6b to 6 d describing the output of the H_(sync) detector 23 (FIG. 2).The output signals H_(I) and φ_(I) are provided to H-filter 24 togenerate the filtered signals H_(o) and φ_(o) (FIGS. 10d, 10 e) suppliedto the μP 19 and the pixel interpolation filter 9, respectively.

[0071] Finally, the filtered H pulse (FIG. 10f) is supplied to thedeflection driver 22 (FIG. 2). Apart from the timing, FIG. 10 alsoillustrates the effect of the time delay. Using a line delay correspondsto case b) in FIG. 10b, where the estimation time point is approximatelyseven lines in the past, referring to the actual detected H_(sync)pulse. This configuration is adapted to the present embodiment havingeight lines of video memory. Of course, the size of the memory and theparameters of the line delay may be different in other embodiments ofthe invention. The line delay following the vertical signal processingblock is needed to compensate the line delay of the video streams (Y/Cor composite video) and uses the same delay time as the video streamline delay. The realization of the line delay for the vertical signalneeds much less hardware; it is a binary signal (V-Imp, Field).

[0072] The last building blocks “Line-Memory Dual-Port” and“Synchronization-Logic” are used to synchronize the output signals fordifferent display techniques.

[0073] The present embodiment of the invention uses a free-runningoutput clock frequency and outputs a fixed number of pixels per line.Depending on the variation of horizontal and vertical input frequency,the number of lines per each output field can vary. Fieldsynchronization is possible by changing the number of output lines perfield. Therefore, this mode is ideally suited to drive CRTs for thefollowing reasons.

[0074] i) Tube displays are horizontally stable, when the horizontalfrequency of the driver stage is essentially constant (crystal locked).

[0075] ii) DC-coupled vertical CRT driver stages are able to adapt tochanging line numbers per field without any visible degradation.

[0076] iii) This mode is also compatible with future multimedia-systems,where the usage of a line-locked clock system might be not acceptable.

[0077] A constant horizontal (H_(sync)) frequency can be obtained by theproposed sync algorithm, when some lines of buffer memory are used tocompensate the different line durations T_(H) between the buffer inputand output during one field (T_(H)≠const., T_(H,out)=const.). Thiscorresponds to a variation of the number of pixels per line at thebuffer input and a constant number of pixels per line at the bufferoutput.

[0078] The vertical coupling is field synchronous. This means, that thevertical frequency of the output adapts at the end of each field to thevertical timing of the input to obtain correct field synchronization(T_(V)=T_(V,out)≠const.). The maximum needed line buffer size is definedby the maximum difference between the input and output memory addressesduring one field. Hence, for a maximum averaged H-frequency variation of±0.5% including phase-skips at the writing and constant outputH-frequency at the reading, the line buffer memory size must at least becapable to store three video lines. The implementation of the verticalsynchronization with changing vertical frequency in CRT-TVs does notpresent difficulties for a person skilled in the art. This type ofsynchronization can also be used for other display technologies like LCDor plasma displays.

[0079] It is noted that the use of a video line memory according to theinvention for the purpose to take into account subsequent horizontalsync pulses is not limited to the use of FIR filters. The same conceptcan be applied with linear regression as filtering function. Filteringby linear regression with different regression lengths is disclosed inEP-A 0 899 945. In combination with the video line memory the knownfilter concept allows “to look into the future” to yield improvedhorizontal filtering. The results achieved by the different techniqueswill be discussed further below.

[0080] The advantage of the new approach can be seen best in the“frequency domain”. FIG. 11 shows a comparison between the conventionalPLL, a system based on a linear regression filter technique withoutvideo line memory and with four lines of video memory and finally theactual new approach based on the FIR filter technology. FIG. 11a showsthe time-base variation tracking and FIG. 9b the noise suppression. Toget a relevant measure of the tracking quality of the sync separation,FIG. 11a shows the error transfer function |1-H_(e)(f)|, where H_(e)(f)is the transfer function of the FIR filter. The error at typicaldistortion frequencies at approximately 30 Hz must be in the order of−60 dB to avoid visible jitter. FIG. 11b details the improvement ofsync-noise suppression compared to PLL and also compared to the previouspatent application. Alternatively, when approximating the LinearRegression by a FIR filter the filter quality is in between thesymmetrical FIR filter and the linear regression without memory. This isa suitable solution for one to approximately five line delays or linememory resulting in asymmetrical FIR coefficients.

[0081] In FIG. 12 a diagram shows the asymmetrical and symmetricalimpulse responses corresponding to filter coefficients of the variousfilter types described above. The + symbols indicate the coefficientsfor linear regression without memory; the x symbols indicate thecoefficients for linear regression with a memory having a size of fourlines; the asterisks * indicate the coefficients for a symmetrical FIRfilter and finally the dots indicate the coefficients of a conventionalPLL design with a fast time constant and infinite impulse response. Onthe abscissa of the diagram in FIG. 12 the indices of the filtercoefficients are plotted. It is noted that the linear regression withand without memory and the PLL filter represent asymmetric filters incontrast to the symmetrical FIR filter.

[0082] Instability in video cannot be printed on paper, however, FIG. 13gives a rough impression about the achievable improvement. A referencemeasurement is made with Philips SAA7113H mounted on an original Philipsevaluation board. FIG. 13a shows the phase-jump response of asynthetically generated VCR search mode and the noise response (SNR=12dB). The typical instability between two phase jumps seen here as offsetbetween two fields as a comb structure is clearly discernible. The combstructure is marked in FIG. 13a by ovals.

[0083]FIG. 13b shows the response of the proposed algorithm using asymmetrical FIR filter. The phase jump response is reduced to 50%. Afterthe phase jump very good stability is achieved and no comb structure dueto phase differences in different picture is visible. In addition, alsothe noise suppression is much better.

1. Method for correcting line synchronization information of an analoguevideo line signal by (a) analyzing the entire or a relevant part of theanalogue video line signal comprising the line synchronization pulses todetermine time instants (t_(i)) defining the temporal position of theline synchronization pulse included in the analogue video line signal,characterized by the following steps: (b) storing a predetermined number(m) of video lines in a line delay, and (c) calculating a time instant(T_(m)) for a video line preceding the currently received video line tomark the temporal position of the synchronization information of thevideo line, wherein the time instant (T_(m)) is a function of the linesynchronization pulse positions (t_(i)) of video lines including thecurrently received, at least one preceding and at least one succeedingvideo line.
 2. Method according to claim 1 characterized in that thevideo line associated with the calculated time instant T_(m) precedesthe currently received video line by the predetermined number (m) ofvideo lines in the line delay.
 3. Method according to claim 1,characterized by (d) convolving the entire or the relevant part of theanalogue video line signal with a pattern function to generate a resultfunction (φ_(sv) (k)) of the convolution operation, and (e) analyzingthe result function (φ_(sv) (k)) of the convolution operation of step(d) to determine time instants (t_(i)) defining the temporal position ofthe line synchronization pulse.
 4. Method according to claim 3,characterized by using an idealized line synchronization pulse as thepattern function.
 5. Method according to claim 1, characterized bycalculating the filtered time instant (T_(m)) for a currently displayedvideo line by interpolation of the time instants determined for videolines preceding and following the currently displayed video line. 6.Method according to claim 5, characterized by calculating the filteredtime instant (T_(m)) for a currently displayed video line by linearinterpolation of the time instants determined for video lines precedingand following the currently displayed video line.
 7. Method according toclaim 1, characterized by filtering the time instants (t_(i)) by an FIRfilter having a set of predetermined filter constants (c_(n,1)). 8.Method according to claim 7, characterized by storing the defined timeinstants (t_(i)) in associated delay elements, wherein the time instantsrepresent the time constant of the delay element, and wherein the delayelements are incorporated in the FIR filter (24).
 9. Apparatus forgenerating a line synchronization pulse from a analogue video linesignal, comprising means for analyzing the entire or a relevant part ofthe analogue video line signal comprising the line synchronizationpulses to determine time instants (t_(i)) defining the temporal positionof the line synchronization pulse included in the video line signal,characterized by a line delay for storing a predetermined number (m) ofvideo line signals, and by means for calculating a time instant (T_(m))for a video line preceding the currently received video line to mark thetemporal position of the synchronization information of the video linewherein the time instant (T_(m)) is a function of the linesynchronization pulse positions (t_(i)) of video lines including thecurrently received, at least one preceding and at least one succeedingvideo line.
 10. Apparatus according to claim 9, characterized by meansfor convolving the entire or the relevant part of the analogue videoline signal with a pattern function.
 11. Apparatus according to claim 9,characterized by an FIR filter having a set of predetermined filterconstants (c_(n,1)).
 12. Apparatus according to claim 9, characterizedby a synchronization pulse detector (23) to measure the time differencebetween two subsequent synchronization pulses.
 13. Apparatus accordingto claim 12, characterized in that the synchronization pulse detector(23) comprises two counters (36 a, 36 b) which are alternatingly reset.14. Apparatus according to claim 11 and 12, characterized in that thesynchronization pulse detector (23) comprises a comparator (41) a firstinput of which is selectively connectable with one of the counters, andthe second input of which is provided with a predicted timing valuegenerated by the FIR filter (24).
 15. Apparatus according to claim 12,characterized in that the synchronization pulse detector (23) suppliesthe measured time difference of two subsequent clock cycles in form ofan integer number (H_(I)) and a fraction (φ_(I)) of cycles of a systemclock.